The present invention relates to a thin film transistor liquid crystal display (TFT-LCD), and in particular, to a TFT LCD array substrate and a method of manufacturing the same.
Due to the advantages of small volume, low power consumption, no radiation and the like, a TFT LCD is becoming dominant in the market of flat panel displays. A TFT LCD is formed by bonding together an array substrate and a color filter substrate opposing to each other. On the array substrate, at least one gate scanning line and at least one signal scanning line intersecting each other to define pixel units are provided, and a pixel electrode and a thin film transistor are provided in each pixel unit. A driving signal is applied through the gate scanning line, and an image data signal is applied to the pixel electrode through the signal scanning line. A black matrix is provided on the color filter substrate, so that light cannot transmit through the areas surrounding the pixel electrodes on the array substrate. A color filter layer is provided corresponding to each pixel area, and on the color filter layer a common electrode is provided. Liquid crystal is filled between the array substrate and the color filter substrate bonded together, and the orientation of liquid crystal can be controlled by the voltage applied across the pixel electrode and the common electrode, so that the transmittance of light is controlled, and with the color filter layer, the color image information can be displayed.
Currently, the gate scanning line and the signal scanning line in a TFT LCD array substrate intersect each other and are separated with an insulating layer and an active layer. That is to say, in the manufacturing process of the TFT LCD, the active layer is deposited on the insulating layer directly, and then the signal scanning line is formed above the active layer. The components of each pixel, such as the gate scanning line, the signal scanning line, the common electrode, and the like, are all formed on the same array substrate and the distance among them is small; therefore, capacitance is easy to be generated among these components. The parasitic capacitance between the gate scanning line and the signal scanning line generates the substantial influence. Since parasitic capacitance generally is not uniformly distributed across the whole panel, storage capacitance for each pixel unit varies accordingly, which in turn renders color distribution over the whole screen not uniform, so that the display quality is degraded. As the size of a TFT LCD is continuously increased, the signal delay on the signal scanning line due to the capacitance effect (RC delay) become serious, so that the time for charging and discharging of the pixel electrodes is seriously restricted, which limits the enhancement of the response rate of the TFT LCD. Furthermore, during manufacturing of the array substrate, electrostatic discharging (ESD) tends to occur at the positions where the gate scanning line and the signal scanning line intersect each other. Electrostatic gradually accumulates during the manufacturing process, and finally the insulating layer and the active layer for separating the gate scanning line and the signal scanning line are subject to breakdown, giving rise to short circuit between the gate scanning line and the signal scanning line and thus bright line on the panel.